ThesisEfficient Neural Network Compression for Reconfigurable Hardware
A significant portion of the computational burden in most neural networks arises from constant matrix-vector multiplications (CMVMs). To address this challenge, linear computation coding (LCC) has emerged as a promising approach for approximating CMVMs in large matrices, while also facilitating a hardware-efficient parallel implementation on reconfigurable hardware, such as FPGAs. However, optimizing CMVMs is just […]A significant portion of the computational burden in most neural networks arises from constant matrix-vector multiplications (CMVMs). To address this challenge, linear computation coding (LCC) has emerged as a promising approach for approximating CMVMs in large matrices, while also facilitating a hardware-efficient parallel implementation on reconfigurable hardware, such as FPGAs. However, optimizing CMVMs is just […]
